TY  - JOUR
T1  - Integrated Host-SSD Mapping Table Cache Management Techniques for Improving Performance of a Mobile Storage Device
AU  - Kim, Yoona 
AU  - Choi, Inhyuk 
AU  - Lee, Sungjin 
AU  - Kim, Jihong 
JO  - Journal of KIISE, JOK
PY  - 2023
DA  - 2023/1/14
DO  - 10.5626/JOK.2023.50.11.924
KW  - mobile storage system
KW  - L2P address translation
KW  - HPB
KW  - L2P cache management
AB  - As the size of a storage device gradually increases, the demand for on-device memory capacity required for managing the address mapping translation of a NAND flash-based storage device increases. The on-device memory capacity of a mobile storage device, Universal Flash Storage (UFS), does not increase due to H/W and cost constraints, making it challenging to manage the increased address translation table. To resolve the problem, Host Performance Booster (HPB), which borrows host-side DRAM memory to load portions of the address translation table was introduced. In this paper, we demonstrate that the HPB-enabled system does not work in an integrated manner with the device-side SRAM, therefore wasting the given memory resource. We propose integrated mapping table management techniques that consider the distinctive features of each cache layer. By adopting these techniques, we aim to minimize wasted cache resources, reduce storage latency, and prevent unnecessary degradation of the storage lifetime. Based on the evaluation results, the cache hit ratio is improved by 5% while the wasted memory resource is reduced by 95%, and the number of device-side garbage collections is reduced by 43% compared to the baseline scheme.