Vol. 44, No. 2,
Feb. 2017
Digital Library
Design and Implementation of a Linux-based Message Processor to Minimize the Response-time Delay of Non-real-time Messages in Multi-core Environments
Sangho Wang, Younghun Park, Sungyong Park, Seungchun Kim, Cheolhoe Kim, Sangjun Kim, Cheol Jin
A message processor is server software that receives non-realtime messages as well as realtime messages from clients that need to be processed within a deadline. With the recent advances of micro-processor technologies and Linux, the message processor is often implemented in Linux-based multi-core servers and it is important to use cores efficiently to maximize the performance of system in multi-core environments. Numerous research efforts on a real-time scheduler for the efficient utilization of the multi-core environments have been conducted. Typically, though, they have been conducted theoretically or via simulation, making a subsequent real-system application difficult. Moreover, many Linux-based real-time schedulers can only be used in a specific Linux version, or the Linux source code needs to be modified. This paper presents the design of a Linux-based message processor for multi-core environments that maps the threads to the cores at user level. The message processor is implemented through a modification of the traditional RM algorithm that consolidates the real-time messages into certain cores using a first-fit-based bin-packing algorithm; this minimizes the response-time delay of the non-real-time messages, while guaranteeing the violation rate of the real-time messages. To compare the performances, the message processor was implemented using the two multi-core-scheduling algorithms GSN-EDF and P-FP, which are provided by the LITMUS framework. The benchmarking results show that the response-time delay of non-real-time messages in the proposed system was improved up to a maximum of 17% to 18%.
Using the On-Package Memory of Manycore Processor for Improving Performance of MPI Intra-Node Communication
Joong-Yeon Cho, Hyun-Wook Jin, Dukyun Nam
The emerging next-generation manycore processors for high-performance computing are equipped with a high-bandwidth on-package memory along with the traditional host memory. The Multi-Channel DRAM (MCDRAM), for example, is the on-package memory of the Intel Xeon Phi Knights Landing (KNL) processor, and theoretically provides a four-times-higher bandwidth than the conventional DDR4 memory. In this paper, we suggest a mechanism to exploit MCDRAM for improving the performance of MPI intra-node communication. The experiment results show that the MPI intra-node communication performance can be improved by up to 272 % compared with the case where the DDR4 is utilized. Moreover, we analyze not only the performance impact of different MCDRAM-utilization mechanisms, but also that of core affinity for processes.
Efficient Process Checkpointing through Fine-Grained COW Management in New Memory based Systems
Jay H. Park, Young Je Moon, Sam H. Noh
We design and implement a process-based fault recovery system to increase the reliability of new memory based computer systems. A rollback point is made at every context switch to which a process can rollback to upon a fault. In this study, a clone process of the original process, which we refer to as a P-process (Persistent-process), is created as a rollback point. Such a design minimizes losses when a fault does occur. Specifically, first, execution loss can be minimized as rollback points are created only at context switches, which bounds the lost execution. Second, as we make use of the COW (Copy-On-Write）mechanism, only those parts of the process memory state that are modified (in page units) are copied decreasing the overhead for creating the P-process. Our experimental results show that the overhead is approximately 5% in 8 out of 11 PARSEC benchmark workloads when P-process is created at every context switch time. Even for workloads that result in considerable overhead, we show that this overhead can be reduced by increasing the P-process generation interval.
Keyword Network Visualization for Text Summarization and Comparative Analysis
Kyeong-rim Kim, Da-yeong Lee, Hwan-Gue Cho
Most of the information prevailing in the Internet space consists of textual information. So one of the main topics regarding the huge document analyses that are required in the “big data” era is the development of an automated understanding system for textual data; accordingly, the automation of the keyword extraction for text summarization and abstraction is a typical research problem. But the simple listing of a few keywords is insufficient to reveal the complex semantic structures of the general texts. In this paper, a text-visualization method that constructs a graph by computing the related degrees from the selected keywords of the target text is developed; therefore, two construction models that provide the edge relation are proposed for the computing of the relation degree among keywords, as follows: influence-interval model and word- distance model. The finally visualized graph from the keyword-derived edge relation is more flexible and useful for the display of the meaning structure of the target text; furthermore, this abstract graph enables a fast and easy understanding of the target text. The authors’ experiment showed that the proposed abstract-graph model is superior to the keyword list for the attainment of a semantic and comparitive understanding of text.
An Architectural Pattern Recommendation Method Based on a Quality-Attributes Trade-off Analysis
Recently, the accomplishment of a system’s quality attributes requires the negotiation of increasingly complex requirements, and this is because the contextual and developmental environments in which software is used has undergone broad changes. Nevertheless, with regard to most architectural designs, many of the proportions depend on the architect’s intuition. Moreover, even if reusable architectural patterns are adapted to an architectural design, common schemas for the description of their use are nonexistent, and it is difficult to make a comparison for the selection of an appropriate systemic pattern because the focus of the schemas is not the user’s perspective. To achieve a fast initial-design decision, this paper suggests new schemas that reduce the distance between the quality attribute requirements and the design by reinterpreting architectural patterns from the user’s perspective. Also, based on the reconstructed pattern model that is derived from the use of the new schemas, an architectural-pattern recommendation method (APOQATo) for which the trade-off and the constraints that are due to the design decision are considered is provided as well as the advantages of the architectural pattern for which the quality attributes are satisfied.
Addressing Low-Resource Problems in Statistical Machine Translation of Manual Signals in Sign Language
Hancheol Park, Jung-Ho Kim, Jong C. Park
Despite the rise of studies in spoken to sign language translation, low-resource problems of sign language corpus have been rarely addressed. As a first step towards translating from spoken to sign language, we addressed the problems arising from resource scarcity when translating spoken language to manual signals translation using statistical machine translation techniques. More specifically, we proposed three preprocessing methods: 1) paraphrase generation, which increases the size of the corpora, 2) lemmatization, which increases the frequency of each word in the corpora and the translatability of new input words in spoken language, and 3) elimination of function words that are not glossed into manual signals, which match the corresponding constituents of the bilingual sentence pairs. In our experiments, we used different types of English-American sign language parallel corpora. The experimental results showed that the system with each method and the combination of the methods improved the quality of manual signals translation, regardless of the type of the corpora.
Automated Unit-test Generation for Detecting Vulnerabilities of Android Kernel Modules
In this study, we propose an automated unit test generation technique for detecting vulnerabilities of Android kernel modules. The technique automatically generates unit test drivers/stubs and unit test inputs for each function of Android kernel modules by utilizing dynamic symbolic execution. To reduce false alarms caused by function pointers and missing pre-conditions of automated unit test generation technique, we develop false alarm reduction techniques that match function pointers by utilizing static analysis and generate pre-conditions by utilizing def-use analysis. We showed that the proposed technique could detect all existing vulnerabilities in the three modules of Android kernel 3.4. Also, the false alarm reduction techniques removed 44.9% of false alarms on average.
Document Summarization Considering Entailment Relation between Sentences
Youngdae Kwon, Noo-ri Kim, Jee-Hyong Lee
Document summarization aims to generate a summary that is consistent and contains the highly related sentences in a document. In this study, we implemented for document summarization that extracts highly related sentences from a whole document by considering both similarities and entailment relations between sentences. Accordingly, we proposed a new algorithm, TextRank-NLI, which combines a Recurrent Neural Network based Natural Language Inference model and a Graphbased ranking algorithm used in single document extraction-based summarization task. In order to evaluate the performance of the new algorithm, we conducted experiments using the same datasets as used in TextRank algorithm. The results indicated that TextRank-NLI showed 2.3% improvement in performance, as compared to TextRank.
Hole-Filling Method for Depth-Image-Based Rendering for which Modified-Patch Matching is Used
Jea-Hyung Cho, Wonseok Song, Hyuk Choi
Depth-image-based rendering is a technique that can be applied in a variety of 3D-display systems. It generates the images that have been captured from virtual viewpoints by using a depth map. However, disoccluded hole-filling problems remain a challenging issue, as a newly exposed area appears in the virtual view. Image inpainting is a popular approach for the filling of the hole region. This paper presents a robust hole-filling method that reduces the error and generates a high quality-virtual view. First, the adaptive-patch size is decided using the color and depth information. Also, a partial filling method for which the patch similarity is used is proposed. These efforts reduce the error occurrence and the propagation. The experiment results show that the proposed method synthesizes the virtual view with a higher visual comfort compared with the existing methods.
Models for Privacy-preserving Data Publishing : A Survey
Jongseon Kim, Kijung Jung, Hyukki Lee, Soohyung Kim, Jong Wook Kim, Yon Dohn Chung
In recent years, data are actively exploited in various fields. Hence, there is a strong demand for sharing and publishing data. However, sensitive information regarding people can breach the privacy of an individual. To publish data while protecting an individual’s privacy with minimal information distortion, the privacy- preserving data publishing(PPDP) has been explored. PPDP assumes various attacker models and has been developed according to privacy models which are principles to protect against privacy breaching attacks. In this paper, we first present the concept of privacy breaching attacks. Subsequently, we classify the privacy models according to the privacy breaching attacks. We further clarify the differences and requirements of each privacy model.
Implementation of a Prefetch method for Secondary Index Scan in MySQL InnoDB Engine
Flash SSDs have many advantages over the existing hard disks such as energy efficiency, shock resistance, and high I/O throughput. For these reasons, in combination with the emergence of innovative technologies such as 3D-NAND and V-NAND for cheaper cost-per-byte, flash SSDs have been rapidly replacing hard disks in many areas. However, the existing database engines, which have been developed mainly assuming hard disks as the storage, could not fully exploit the characteristics of flash SSDs (e.g. internal parallelism). In this paper, in order to utilize the internal parallelism intrinsic to modern flash SSDs for faster query processing, we implemented a prefetching method using asynchronous input/output as a new functionality for secondary index scans in MySQL InnoDB engine. Compared to the original InnoDB engine, the proposed prefetching-based scan scheme shows three-fold higher performance in the case of 16KB-page sizes, and about 4.2-fold higher performance in the case of 4KB-page sizes.
The IEEE 802.15.4e based Distributed Scheduling Mechanism for the Energy Efficiency of Industrial Wireless Sensor Networks
The Internet of Things (IoT) technology is rapidly developing in recent years, and is applicable to various fields. A smart factory is one wherein all the components are organically connected to each other via a WSN, using an intelligent operating system and the IoT. A smart factory technology is used for flexible process automation and custom manufacturing, and hence needs adaptive network management for frequent network fluctuations. Moreover, ensuring the timeliness of the data collected through sensor nodes is crucial. In order to ensure network timeliness, the power consumption for information exchange increases. In this paper, we propose an IEEE 802.15.4e DSME-based distributed scheduling algorithm for mobility support, and we evaluate various performance metrics. The proposed algorithm adaptively assigns communication slots by analyzing the network traffic of each node, and improves the network reliability and timeliness. The experimental results indicate that the throughput of the DSME MAC protocol is better than the IEEE 802.15.4e TSCH and the legacy slotted CSMA/CA in large networks with more than 30 nodes. Also, the proposed algorithm improves the throughput by 15%, higher than other MACs including the original DSME. Experimentally, we confirm that the algorithm reduces power consumption by improving the availability of communication slots. The proposed algorithm improves the power consumption by 40%, higher than other MACs.
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